Ferroelectric space charge capacitor memory devices as recently revealed, for example in the applications cited above, include a pair of spaced electrodes with a ferroelectric dielectric between them. A coercive voltage is applied as a write signal to the ferroelectric dielectric to write the dielectric into a predetermined polarization state in the range from zero to maximum coerced polarization to establish proximate the interface between the dielectric and each electrode a space charge region having a charge opposite to that applied to the electrode with a neutral region between the space charge regions. The relative sizes of the neutral and space charge regions define the capacitance of the dielectric. The neutral region has an internal polarization field opposite that represented by the space charge regions. A bias voltage less than the coercive voltage is applied at a rate slower than the rate of space charge formation in order to define a capacitance level representative of a predetermined polarization state. A read signal is applied at a rate faster than the rate of space charge formation, and together with a bias voltage sums to less than the coercive voltage. In response to the read signal, a determination is made as to the capacitive level as to the level of the capacitance which represents a predetermined polarization state. These devices can be used in both analog and digital memory systems. In digital applications the dielectric is written into one of two polarization states representing the binary states. In these systems the biasing voltage is typically provided by an external power supply which adds to the cost, size and complexity of the overall system.